A few years ago I started building eNSPanel, an open-source custom PCB replacement for the Sonoff NSPanel. Each revision got a little better. Around the sixth or seventh revision I wanted to clean up the thermal management and finally call the design done.

Then my son was born and I stopped sleeping. The board sat in a drawer for months.

The chip that wouldn’t behave

When I came back to it, the same regulator was still cooking. The ST1S10PHR step-down was drawing absurd current and heating like a stove the instant I powered the board. Output rail flat. No oscillation, no soft recovery, just heat.

A day taking orders from Opus

So I did what people do in 2026. I gave the schematic, the layout, every measurement, and the datasheet to Claude Opus and started debugging with it. Claude as the debugger, me as the manual labor.

We went all day.

Cut this trace. Replace those caps. Swap the chip, it might be a counterfeit. Bridge here. Lift this pin. Measure pin 3 to ground again. Now pin 7. Now pin 1. Try a different input voltage. Add a pulldown. Remove the pulldown. Replace the chip again.

I did all of it. I have the flux burns to prove it. By the evening I had eight dead ST1S10PHR samples, a board that looked like a battlefield, and the exact same symptom I had at 9am.

Ten minutes on Reddit

Out of options, I dumped everything into a r/AskElectronics post: schematic, layout, every measurement. I added the now-traditional disclaimer: “I even asked AI, but it didn’t tell me anything valuable.”

Reddit moderation held the post for a while. Ten minutes after it went live, I had the answer.

A user named Ard-War, flair “Electron Herder”, looked at the schematic and asked exactly one question:

“Why is there 4μ7 across VIN and SW? I’m surprised it wasn’t outright going in flames with that.”

A 4.7µF capacitor I had wired straight between VIN and the switching node. Every cycle, the chip was effectively shorting its own switching pin to the input rail. His follow-up read like a sentence you only write after years next to these parts:

“microfarads with microohm ESR is really in smokes and fires category.”

One question. No new component. No exotic measurement. A schematic review by someone who has laid out hundreds of buck converters and would never have placed a cap there in the first place.

I removed the offending cap, fixed the layout, populated a fresh chip, and the rail came up clean. I posted “Thanks IT works” and the redesigned schematic. Ard-War reviewed that one too. Production ready.

Expertise is the guardrail

The takeaway is not “LLMs are bad”. I use them every day, and on text problems they are extraordinary. The point is narrower, and, for me, important.

For hardware, Opus was happy to give me a confident, plausible, completely useless plan for an entire day. Not because it was lying, but because the failure mode was a switching-regulator layout error: a domain where the priors are very specific, the failure modes are visual, and the right answer usually comes from someone who has stared at a hundred buck-converter layouts.

If you are an expert in what you are asking the model to do, an LLM is an amplifier. You steer, it accelerates, and your existing knowledge keeps it from walking you off a cliff.

If you are not, and the domain is unforgiving, you can spend a full day executing a sequence of expensive, irreversible moves that lead nowhere, and never even realize you are off the map.

I am no EE. I am a software engineer who solders. That gap does not show up on any benchmark I have seen.

I lost a day and eight chips. Reddit cost me one post and a “Thanks IT works”.

For the kind of problems I usually solve, the model is winning by a mile. For this one, the model wasn’t even close.

1-0.